From a82a7d708e2827361a6610c784625935e5b8dcb6 Mon Sep 17 00:00:00 2001
From: Zenithal <i@zenithal.me>
Date: Tue, 20 Dec 2022 14:47:13 +0800
Subject: [PATCH] riscv-toolchains: add more

---
 riscv-toolchains.json | 42 +++++++++++++++++++++++++++++++++++++++++-
 riscv-toolchains.sh   | 10 ++++++++++
 2 files changed, 51 insertions(+), 1 deletion(-)

diff --git a/riscv-toolchains.json b/riscv-toolchains.json
index 1a5b4fa..febd90d 100644
--- a/riscv-toolchains.json
+++ b/riscv-toolchains.json
@@ -1,3 +1,43 @@
 [
-    "riscv-collab/riscv-gnu-toolchain"
+    "riscv-collab/riscv-gnu-toolchain",
+    {
+        "repo": "riscv/riscv-isa-manual",
+        "versions": -1
+    },
+    {
+        "repo": "riscv/riscv-crypto",
+        "versions": -1
+    },
+    {
+        "repo": "riscv/riscv-v-spec",
+        "versions": -1
+    },
+    {
+        "repo": "riscv/riscv-debug-spec",
+        "versions": -1
+    },
+    {
+        "repo": "riscv/riscv-bitmanip",
+        "versions": -1
+    },
+    {
+        "repo": "riscv/riscv-plic-spec",
+        "versions": -1
+    }.
+    {
+        "repo": "riscv/riscv-code-size-reduction",
+        "versions": -1
+    },
+    {
+        "repo": "riscv/riscv-bfloat16",
+        "versions": -1
+    },
+    {
+        "repo": "riscv-non-isa/riscv-elf-psabi-doc",
+        "versions": -1
+    },
+    {
+        "repo": "riscv-non-isa/riscv-sbi-doc",
+        "versions": -1
+    }
 ]
diff --git a/riscv-toolchains.sh b/riscv-toolchains.sh
index 57e5128..82dbf33 100755
--- a/riscv-toolchains.sh
+++ b/riscv-toolchains.sh
@@ -18,6 +18,16 @@ mkdir -p $RELEASE_PATH
 # git
 declare -a upstreams=(
     "https://github.com/riscv-collab/riscv-gnu-toolchain.git"
+    "https://github.com/riscv/riscv-isa-manual.git"
+    "https://github.com/riscv/riscv-opcodes.git"
+    "https://github.com/riscv/riscv-openocd.git"
+    "https://github.com/riscv/sail-riscv.git"
+    "https://github.com/riscv-non-isa/riscv-arch-test.git"
+    "https://github.com/riscv-software-src/riscv-tools.git"
+    "https://github.com/riscv-software-src/riscv-isa-sim.git"
+    "https://github.com/riscv-software-src/opensbi.git"
+    "https://github.com/riscv-software-src/riscv-tests.git"
+    "https://github.com/chipsalliance/rocket-tools.git"
 )
 
 export RECURSIVE=1